Intel Foundry has unveiled new advancements that will help drive the semiconductor industry over the next decade, including subtractive ruthenium (Ru), a material intended to improve chip performance and interconnections.
Intel’s foundry division has announced its progress at the IEEE International Electron Devices Meeting (IEDM) 2024, where it has stressed that as the industry is on track to fit a trillion transistors on a chip by 2030advances in scaling “are critical” to satisfy the endless appetite for more energy-efficient computing applications, such as Artificial Intelligence (AI).
Intel Foundry has identified several avenues that Resolves anticipated limitations of current copper connectors for interconnect scaling in future nodesaimed at improving existing assembly techniques.
Firstly, it has introduced subtractive ruthenium (Ru), to help improve performance and interconnections within chips. It is a key new alternative metallization material that uses air-gap thin-film resistivity to deliver a “significant” advance in interconnect scaling, according to the firm.
By implementing this set of materials, Line-to-line training has been reduced by up to 25% in steps less than or equal to 25 nanometers (nm).
On the other hand, the aforementioned division has demonstrated selective layer transfer (SLT), an integration solution that allows the assembly of ultrathin chips with greater flexibility for enable smaller chip sizes and higher aspect ratioscompared to traditional chip and wafer bonding.
Thanks to this, it supports a greater functional density, which gives rise to a more flexible and cost-effective solution for hybrid or fusion bonding of specific chiplets from one wafer to another.
Finally, Intel Foundry has laid out its vision for the future and has identified three axes of innovation to help drive the next decade towards more energy-efficient technology, with advanced memory integration aimed at eliminating bottlenecks of capacity, bandwidth and latency.
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