A record discovered in the SiSoftware Sandra database includes a direct reference to Intel Alder Lake-S, the next generation of high-performance processors for general consumption that, if all goes according to plan, will be presented between the end of this year and the beginning of next year, and will be the successor to Rocket Lake-S.
As many of our readers will remember, Intel Alder Lake-S will mark a major turning point because it will be the chip giant’s first generation of processors to use a big.LITTLE design. Have you got lost? Well, don’t worry, I’ll explain what this means.
In a traditional processor, the CPU is made up of a single type of cores based on a certain architecture. These cores can be integrated via a monolithic core design (a single silicon chip) or an MCM design (multiple silicon chips), but its architecture is the same.
Well, with the jump to a big.LITTLE structure we find ourselves a minimum of two core blocks based on different architectures. In the case of the Intel Alder Lake-S generation, one block is expected to be made up of high-performance Core cores, based on the Willow Cove architecture, and another block made up of low-power Atom cores, based on the Tremont architecture. .
What does this leak tell us about the Intel Alder Lake-S?
Very interesting things, really. This information indicates that Intel Alder Lake-S processors will feature a maximum of 16 cores, divided into two blocks that will follow the big.LITTLE pattern that we have explained previously.
The high-performance block of cores will feature HyperThreading technology, which means you can move 8 processes and 8 threads (16 threads total). However, the low-power core block will not have such technology, which means it will be limited to 8 wires, at least in theory, since we cannot rule out that it is an early engineering sample of the Intel Alder Lake-S series, and that the final version does have HyperThreading applied to all its cores.
Regarding the working frequencies, we can see two values, a base frequency, which works at 1.8 GHz, and a turbo mode that reaches 4 GHz. This turbo mode will probably refer to the maximum that the processor can reach with a single active core. The rest of the specs in this sample of the Intel Alder Lake-S series are rounded out with a total of 42.50 MB cache (L2 and L3) and an integrated Xe GPU with up to 256 graphics cores or shaders.
The GPU operates at a maximum of 1,500 MHz and is based on the new Gen 12.2 architecture. How could it be otherwise, Intel Alder Lake-S is ready to work with DDR5 memoryIn fact, the sample that was registered in the SiSoftware Sandra database worked with DDR5 at 4,800 MHz.
I remind you that the generation of Intel Alder Lake-S processors will be manufactured in the process of 10 nm, will use the new LGA1700 socket, successor to the current LGA1200, will mount the Intel 600 series chipset and will have DDR5 memory and PCIE Gen5, although the latter still raises some doubts, and may in the end be limited to PCIE Gen4.
Thanks to the jump to the Willow Cove architecture, the same one that Intel uses in the Tiger Lake processors, the Intel Alder Lake-S processors will offer a double digit improvement in CPI terms in front of Rocket Lake-S, and will be able to work more efficiently thanks to its big.LITTLE structure. The performance of its new integrated GPUs also promises a notable improvement.